Supermicro H12DSI-N6/NT6

In diesem Wiki Artikel finden Sie Versionsinformationen zum H12DSI-N6/NT6. Diese Dual-CPU Mainboards unterstützen AMD EPYC 7003 Milan und AMD EPYC 7002 Rome Prozessoren.

Downloads

BIOS und BMC Downloads bei Thomas-Krenn:

• Supermicro Mainboard H12DSi-NT6

BIOS Informationen

Microcode

Die folgenden Versionsinformationen wurden mit MCExtractor von Plato Mavropoulos erhoben.

BIOS Version	Microcode
	CPUID 00830F10	CPUID 00830F00	CPUID 00A00F12	CPUID 00A00F11	CPUID 00A00F10	CPUID 00A00F00	CPUID 00A00F82
2.4	08301055 (2022-02-15)	08300027 (2019-04-01)	0A001229 (2022-02-10)	0A001173 (2022-01-31)	0A001058 (2022-02-10)	0A000033 (2020-04-13)	n/a
2.6			0A001231 (2023-01-17)	0A001078 (2023-01-17)	0A001078 (2023-01-14)		0A008205 (2022-04-14)
2.7	0830107A (2023-05-17)		0A001234 (2023-07-10)	0A0011D1 (2023-07-10)	0A001079 (2023-06-09)

Changelog

Die folgenden Versionsinformationen stammen von den BIOS Release Notes des H12DSI-N6/-NT6:

2.7 (10/25/2023)
Enhancements
1. Updated Milan B0/B1/B2 stepping CPU microcode and Milan-X B2
stepping CPU microcode for AMD-SB-7005 Security Bulletin to
address CVE-2023-20569 issue. B0 Milan microcode 0x0A001079,
B1 Milan microcode 0x0A0011D1, B2 Milan-X microcode
0x0A001234.
2. Support for Supermicro System LockDown feature.
3. Updated Rome B0 stepping CPU microcode 0x0830107A for AMD-
SB-7008 Security Bulletin to address CVE-2023-20593 issue.
4. Added Rocky Linux Boot Option Name.
5. Restored SMCI secure boot keys and Updated Secure Boot DB
variable.
6. Updated MilanPI to 1.0.0.B based on 5.22_MilanCrb_0ACOU022.
7. Updated AGESA RomePI to 1.0.0.G based on
5.14_RomeCrb_0ACMK027.
8. Support for changing Pxe from Uefi(U)/Legacy(L) to L/U through
Redfish.
Fixes
1. Fixed PCIe Link Width of AOC-SLG4-2H8M2 downgraded to x4.
2. Set RDIMM\LRDIMM\3DSDIMM memory throttling trip-point at
85C part II.
3. Fixed some dmivar unfit with ami smbios settings.

2.6 (4/13/2023)
1. Removed "Vendor Keys" on security page.
2. Modified String naming from SMCI to Supermicro.
3. Updated DBX file to fix Secure Boot Bypass issue.
4. Updated MilanPI to 1.0.0.A based on 5.22_MilanCrb_0ACOU021 for AMD-SB-1032.
5. Updated Milan B0/B1/B2 stepping CPU microcode and Milan-X B2 stepping CPU microcode to
patch for Errata 1304, 1310, 1311, 1313, 1329, 1330, 1336, 1343, 1350, 1352, 1361, 1378,1379,
1381, 1386, 1407, 1433, 1450.
29126B0 Milan microcode 0x0A001078,
B1 Milan microcode 0x0A0011CE,
B2 Milan-X microcode 0x0A001231.
6. Followed the SMBIOS template to sync the chassis type from FRU0 to SMBIOS Type 03 (only for
H12 projects).
7. Updated AGESA RomePI to 1.0.0.F based on 5.14_RomeCrb_0ACMK026 for AMD-SB-1032.
8. Added FSRM and ERMSB items support. (Milan only, Rome not supported. PI 1009 changed
default to enabled (Auto).
9. [SecurityErase] Modified GetVariable() service for buffer overflow in certain cases.

2.4 (4/22/2022)
1. Changed BIOS revision to 2.4.
2. Added setup item, "ASPM Support" to PCIe/PCI/PnP Configuration Page.
3. Added "Factory Mode" function to Production test.
4. Updated AGESA RomePI to 1.0.0.D.
5. Updated Rome B0 stepping CPU microcode 0x08301055 to patch Errata 1161, 1176, 1179, 1183,
1214, 1268, 1386, 1417.
6. Updated AGESA MilanPI to 1.0.0.8.
7. Updated Milan B0/B1/B2 stepping CPU microcode and Milan-X B2 stepping CPU microcode to
patch for Errata 1304, 1310, 1311, 1313, 1329, 1330, 1336, 1343, 1350, 1352, 1361, 1378, 1379,
1381, 1386, 1407, 1415.
B0 Milan microcode 0x0A001058,
B1 Milan microcode 0x0A001173,
B2 Milan-X microcode 0x0A001229.
8. Added setup item, "SNP Memory (RMP Table) Coverage" and "Amount of Memory to Cover" to
CPU Configuration Page.

BMC Informationen

BMC Versionen

Die folgenden Versionsinformationen stammen von den BMC Firmware Release Notes des H12DPI-N6/-NT6:

BMC Version	Build-Date
1.00.26	(10-05-2021)
1.01.13	(04-27-2022)
1.01.25	(04-14-2023)

Changelog

Auszug aus den Changelogs:

1.01.25 (4/14/2023)
Fixes
1. Fixed issue of being unable to configure SNMPv1.
2. Added AOC-S3816L-L16IR and AOC-S3808L-L8IR
3. Removed I2c attack log
4. Fixed issue of system reporting P1_VDDCR and P2_VDDCR
voltage going high during cburn test
5. Changed upper limit of SOCRUN and VDDCR.

1.01.13 (4/27/2022)
1. Fixed: After inserting a S3916 RAID card, there is no event log generated and the IPMI
dashboard is healthy, however it shows red.
2. Fixed: H12DSI-N6 => P2_VMEMABCD/P2_VMEMEFGH Sensor bug.
3. Set IPV6 factory default to ‘enabled’.

1.00.26 (10/05/2021)
1. Corrected Memory FSC on MBD-H12DSI-N6-P.
2. Corrected CPU FSC on MBD_H12DSI-N6 for optimal and Heavy IO.
1.00.23 (6/17/2021)